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VLSI IMPLEMENTATION OF TURBO CODER FOR LTE USINGVERILOG HDL

Abstract

Abstract: Turbo codes are error correction codes that are widely used in communication systems. Turbo codes exhibits higherror correction capability as compared with other error correction codes. This paper proposes a Very Large Scale Integration(VLSI) architecture for the implementation of Turbo decoder. Soft-in-soft out decoders, interleavers and deinterleavers is usedin the decoder side which employs Maximum-a-Posteriori (MAP) algorithm. The number of iterations required to decode theinformation bits being transmitted is reduced by the use of MAP algorithm. For the encoder part, this paper uses a systemwhich contains two Recursive convolutional encoders along with pseudorandom interleaver in encoder side.

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