Abstract

Abstract: Astechnology is increasing rapidly, the usage of low power devices has becomemore usable. One among such is transmission gate 8T SRAM. Static random accessmemory has now a day’s become an important feature in the VLSI chip design.SRAM has become a sustainable research due to its fast development for lowpower. Static random access memory plays most prominent role in themicroprocessor world, but as the technology is scaling down in nanometers,leakage parameters and delay parameters are the most common problems for SRAMcell which is basically designed for very low power applications. This paperpresents architecture of TG8T SRAM cell with an improved version of existing 8TSRAM cell, where all pass transistors are replaced with transmission gates.

Keywords: SRAM, Transmission Gate 8T, leakagepower, delay .